KEY Pre-place, in-place, post-place, incremental, timing-driven and congestion-driven optimization.

Scan Chain Reordering

Scan clustering groups cells from the same region of the chip so that scan connections are made only between cells in that region, which helps reduce both congestion and timing violations.

Types of scan cell ordering:

• Cluster-based scan cell order.
• Power-driven scan cell order.
• Power-optimized, routing-constrained scan cell order.

Power-driven scan cell ordering involves:

• Choosing the chaining of scan cells so the toggle rate during shift operations is minimised.
• Identifying the inputs and outputs of the scan cells to limit transition propagation during scan.
• Reducing scan-chain wire length, which improves routability or shrinks die area while also speeding signals by lowering capacitive loading on shared register pins.
• Recognising that after scan synthesis, simply chaining all scan cells can cause routing congestion during place-and-route, leading to area overhead and timing-closure problems.
• Scan-chain optimization - finding a new connection order for the scan elements that minimises the chain's wire length.

KEY Scan reordering reconnects scan cells to cut wire length, congestion and toggling, easing routing and timing.

Mixed-Edge Flops in a Scan Chain

• For designs mixing positive- and negative-edge flops, the scan-insertion tool always orders the chain so that negative-edge flops come before positive-edge flops, which avoids needing a lockup latch.
• Within the same clock domain, the negedge flops always capture exactly the data that the posedge flops captured on the rising edge of the clock.