if all those paths are violating and the change improves slack.

KEY Insert the buffer near the capture flop to avoid disturbing other paths that share the launch flop.

Power-Aware Placement

Low-power (power-aware) placement uses the available switching-activity data to shorten the wires of high-activity nets. It does not perform optimization itself - for example it does not resize drivers - but it runs alongside timing, power, DRC and congestion optimization, which does resize cells.

KEY Power-aware placement shortens high-activity nets using switching data, running alongside other optimization.

Isolation Cell Placement

The isolation cell should be located in the always-on (AON) domain.

KEY Isolation cells belong in the always-on domain.

Targets at the Placement Stage

• Meeting timing - WNS (worst negative slack), TNS (total negative slack) and FEP (failing endpoints), mainly for register-to-register paths.
• Keeping congestion within limits (around 0.5% horizontal and vertical overflow; for lower-tech hotspots, total overflow under 10000 and the maximum under 200).
• Controlling cell density.
• Controlling pin density.

KEY Placement targets: meet timing (WNS/TNS/FEP), keep congestion in limit, and control cell and pin density.

Inputs Needed for Placement

• A design with floorplanning fully completed.
• The SDC and MMMC setup.
• Design targets such as max_trans and max_area.