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VLSI Physical Design  ›  Ch 7. Setup, Hold & Timing

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  • NLDM models do show the long-tail effect.
  • Conventional STA with an NLDM library cannot account for the Miller effect or the long-tail effect.
  • NLDM timing results can be more optimistic than SPICE.

KEY CCS uses a time/voltage-varying current source and dual receiver caps for deep-submicron accuracy; NLDM is a simpler Thevenin model that can be optimistic.

CRPR on Inverted-Capture Paths Under Crosstalk

No. The crosstalk contribution along the common clock path is different during the launch and capture clock calculations because the launch and capture edges are different - they are separated by half a cycle for both the setup and hold checks. Since those crosstalk values are genuinely not common, they should not be removed from the analysis for either setup or hold.

KEY No - launch and capture edges differ by half a cycle, so the common-path crosstalk is not truly shared.

Hold Check with a Multicycle Value of 2

By default a setup multicycle path is checked against the capture edge (-end) and a hold multicycle path against the launch edge (-start); the -start/-end options change which edges the checks reference. Consider: create_clock -name CLKM -period 10 [get_ports CLKM]; set_multicycle_path 3 -setup -from [get_pins UFF0/Q] -to [get_pins UFF1/D]; set_multicycle_path 2 -hold -from [get_pins UFF0/Q] -to [get_pins UFF1/D]. The setup multicycle of 3 allows the path up to three clock cycles for the setup check. A hold multicycle of 2 is added to restore single-cycle-like hold behaviour. Without it, the default hold check would be one active edge before the setup capture edge, which is not the intent. The hold multicycle number says how many cycles to move back from that default hold edge. Since the setup multicycle is 3, the default hold check sits one edge before the capture edge; a hold multicycle of 2