Signed Binary Numbers
How hardware tells positive from negative using the most-significant bit.
Description
Schemes that encode a sign into a fixed-width bit pattern. Hardware has no '−' symbol; the sign must live inside the bits themselves. Reserve the MSB as the sign; 2's complement gives it weight −2ⁿ⁻¹ so arithmetic just works.
- Sign-magnitude: MSB is sign, rest is magnitude — simple to read, two zeros.
- 1's complement: negative = bit-invert of positive — also two zeros.
- 2's complement: negative = invert + 1 — single zero, arithmetic-friendly (the standard).
- Overflow occurs when the true result falls outside the representable range.
- Detect it when the carry into the MSB differs from the carry out of the MSB.
- What: Schemes that encode a sign into a fixed-width bit pattern.
- Why: Hardware has no '−' symbol; the sign must live inside the bits themselves.
- How: Reserve the MSB as the sign; 2's complement gives it weight −2ⁿ⁻¹ so arithmetic just works.
- Where: Signed integer types and every ALU that handles negative results.
- When: Any computation whose result can be negative.
At a glance
What
Schemes that encode a sign into a fixed-width bit pattern.
Why
Hardware has no '−' symbol; the sign must live inside the bits themselves.
How
Reserve the MSB as the sign; 2's complement gives it weight −2ⁿ⁻¹ so arithmetic just works.
Where
Signed integer types and every ALU that handles negative results.
When
Any computation whose result can be negative.
Think of it like…
Like a thermometer where the top mark is labelled as a big negative: in 2's complement the leftmost column counts as −2ⁿ⁻¹, so flipping that one bit drags the whole number below zero.
Three schemes
- Sign-magnitude: MSB is sign, rest is magnitude — simple to read, two zeros.
- 1's complement: negative = bit-invert of positive — also two zeros.
- 2's complement: negative = invert + 1 — single zero, arithmetic-friendly (the standard).
Overflow
- Overflow occurs when the true result falls outside the representable range.
- Detect it when the carry into the MSB differs from the carry out of the MSB.
Range of n-bit signed integers (2's complement)
| Width n | Min | Max |
|---|---|---|
| 4 | −8 | +7 |
| 8 | −128 | +127 |
| 16 | −32,768 | +32,767 |
| 32 | −2,147,483,648 | +2,147,483,647 |
See signed value of a pattern
▶ live simulatorOriginal (20)
1's complement (invert)
2's complement (invert + 1) → signed -20
The 5 Whys
- 1
Why a special signed format? Bits alone have no sign symbol.
- 2
Why prefer 2's complement? It has one zero and one consistent add rule.
- 3
Why does one add rule help? The same adder handles signed and unsigned values.
- 4
Why fold sign into bit weights? So no separate sign-handling logic is needed.
- 5
Root cause: giving the MSB weight −2ⁿ⁻¹ makes signed arithmetic ordinary binary addition.
Cheat sheet
Working principle
- Reserve the MSB as the sign; 2's complement gives it weight −2ⁿ⁻¹ so arithmetic just works.
- Schemes that encode a sign into a fixed-width bit pattern.
Formulas & Boolean expressions
- 1's complement: negative = bit-invert of positive — also two zeros.
- 2's complement: negative = invert + 1 — single zero, arithmetic-friendly (the standard).
Key facts
- Sign-magnitude: MSB is sign, rest is magnitude — simple to read, two zeros.
- Overflow occurs when the true result falls outside the representable range.
Why it exists
- Root cause: giving the MSB weight −2ⁿ⁻¹ makes signed arithmetic ordinary binary addition.