• Clock skew.

KEY PrimeTime checks timing, design constraints, nets, noise and clock skew.

Assign Statements in a Synthesized Netlist

An assign statement only specifies a function - it does not map to a gate or a net. That creates problems at implementation: in layout, and in the SPICE netlist, there is no net defined to represent it, so it cannot be physically realised.

KEY Assign statements define function but no gate/net, causing layout and SPICE netlist problems.