When STA Is Done

STA can be run after synthesis. It should be done once before layout and another two or three times after layout. Sign-off STA is done after routing.

KEY STA runs after synthesis, once before layout, a few times after, and at sign-off post-route.

STA vs Circuit Simulation

• STA does not handle input-output variables, so it is faster than circuit simulation.
• STA gives deeper insight through worst-case timing analysis of all possible logic conditions, whereas circuit simulation only verifies a particular set of input-output variables.

KEY STA is faster and covers all logic conditions worst-case; simulation only checks specific input-output sets.

How STA Is Performed on a Circuit

• The design is divided into a set of possible timing paths.
• The signal propagation delay is calculated for every path.
• The STA tool analyses the timing constraints of all paths, compares them with the ideal constraints, and checks for any timing violation.
• It checks for timing violations both inside the design and at the input-output interface.

Design flow: Simulation -> Synthesis -> STA -> Layout -> Sign-off.

KEY STA splits the design into paths, computes delays, and compares them against ideal constraints for violations.

Paths a Designer Considers in Timing

• Data path.
• Asynchronous path.
• Clock path.
• Clock-gating path.
• The worst and best paths.
• Capture and launch paths.