KEY N-well to VDD and P-substrate to VSS keep the body junctions reverse-biased.

Well-Edge Proximity (WEP) Effect

Transistors located near the edge of a retrograde well (for example, within about 1 micron of the edge) can have a different threshold voltage from those farther inside the well. This happens because implant ions scatter off the photoresist mask and land at the well edge, altering the local doping - this is the well-edge proximity effect.

KEY Ions scattering off the resist mask shift Vt for transistors near a well edge - the WEP effect.

Short-Circuit Current and Transition Time

• When a rising input is applied to a CMOS inverter, the NMOS turns on once Vgs exceeds Vtn while the PMOS turns off. For a brief interval during the transition, when Vtn < Vgs < VDD - Vtp, both transistors conduct at the same time, allowing a current Isc to flow from VDD to GND. This is the short-circuit current, and the power it dissipates is the short-circuit power (Psc).
• With fast transitions this power is small, but with slow transitions short-circuit power can be as much as 30% of the gate's total power. It depends on the transistor dimensions and the load capacitance at the gate output.

KEY Short-circuit current flows while both transistors conduct during a transition; slow transitions make it a large power component.

Drive Strength vs Fanout

Drive strength is the driving capability of a cell:

• It is the maximum capacitance a device can drive.
• It is captured in the .lib file as max_capacitance. Fanout is about the number of loads:
• It is the count of gates a cell drives.
• The device models determine the allowable fanout.
• Technology variation also influences the fanout limit.