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Volume II: Digital Logic  ›  Registers & Counters

Shift Registers

A register that moves its bits one position each clock — left, right, or in a ring.

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Description

A register whose bits shift one place per clock, optionally taking a serial input. It converts between serial and parallel data and builds delays and sequence generators. Each flip-flop's output feeds the next flip-flop's input; a serial bit enters one end.

  • SISO — serial in, serial out (a delay line).
  • SIPO — serial in, parallel out (deserializer).
  • PISO — parallel in, serial out (serializer).
  • PIPO — parallel in, parallel out (a normal load register).
  • Ring: the output wraps straight back to the input — n distinct states.
  • Johnson (twisted ring): the complemented output wraps back — 2n states.
  • What: A register whose bits shift one place per clock, optionally taking a serial input.
  • Why: It converts between serial and parallel data and builds delays and sequence generators.
  • How: Each flip-flop's output feeds the next flip-flop's input; a serial bit enters one end.
  • Where: UART/SPI serializers, LFSRs, delay lines, ring/Johnson counters.

At a glance

What

A register whose bits shift one place per clock, optionally taking a serial input.

Why

It converts between serial and parallel data and builds delays and sequence generators.

How

Each flip-flop's output feeds the next flip-flop's input; a serial bit enters one end.

Where

UART/SPI serializers, LFSRs, delay lines, ring/Johnson counters.

When

Whenever data must move serially or be delayed by clock cycles.

Think of it like…

A bucket brigade: each clock, every person passes their bucket to the next. A ring brigade forms a circle so buckets keep going around.

Four data paths

  • SISO — serial in, serial out (a delay line).
  • SIPO — serial in, parallel out (deserializer).
  • PISO — parallel in, serial out (serializer).
  • PIPO — parallel in, parallel out (a normal load register).

Ring vs Johnson

  • Ring: the output wraps straight back to the input — n distinct states.
  • Johnson (twisted ring): the complemented output wraps back — 2n states.

Counter from shift register

TypeFeedbackStates (n FFs)
RingQlast → Qfirstn
JohnsonQlast′ → Qfirst2n

Black-box view

Serial inCLKShift Registerblack boxQ3Q2Q1Q0

Inputs on the left → outputs on the right · particles show signal direction

Shift, ring, and Johnson modes

▶ live simulator
1Q3
0Q2
0Q1
0Q0

Pick a mode, then press Clock ▲ to shift and trace each bit.

Real-world applications

UART/SPI serial I/OLFSR (CRC, pseudo-random)Delay linesSequence generators

The 5 Whys

  1. 1

    Why shift registers? To move data serially and convert serial↔parallel.

  2. 2

    Why serial transfer? It needs only one wire instead of n.

  3. 3

    Why ring/Johnson? They make cheap, glitch-free counters.

  4. 4

    Why Johnson over ring? Twice the states for the same flip-flops.

  5. 5

    Root cause: chaining flip-flops output-to-input turns storage into controlled motion of bits.

Cheat sheet

Working principle

  • Each flip-flop's output feeds the next flip-flop's input; a serial bit enters one end.
  • A register whose bits shift one place per clock, optionally taking a serial input.

Formulas & Boolean expressions

  • Right shift: Qᵢ⁺ = Qᵢ₊₁ (serial-in → MSB)
  • Ring states = n, Johnson states = 2n

Key facts

  • SISO — serial in, serial out (a delay line).
  • Ring: the output wraps straight back to the input — n distinct states.

Why it exists

  • Root cause: chaining flip-flops output-to-input turns storage into controlled motion of bits.
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