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VLSI Physical Design  ›  Ch 11. Cell Libraries & ECO

FEOL footprint as the ECO filler cells.

  • The only difference is that a functional ECO reuses the ECO filler FEOL layout but adds contact connections to the poly, diffusion and metal1 layers to wire up a working gate internally.

KEY ECO cells are FEOL-based fillers; functional ECO cells reuse that footprint with metal connections to form real gates.

Unateness of Timing Arcs

  • Positive unate: a timing arc where the output transitions in the same direction as the input (or does not change). Examples: AND, OR.
  • Negative unate: a timing arc where the output transitions opposite to the input (or does not change). Examples: NAND, NOR, inverter.
  • Non-unate: the output transition cannot be predicted from one input's direction alone - it also depends on the states of the other inputs. Example: XOR.

KEY Positive unate keeps direction, negative unate flips it, non-unate depends on other inputs (XOR).

Inputs Required for StarRC

  • A Milkyway, GDSII or LEF/DEF database.
  • A layer mapping file.
  • An nxtgrd file, which contains the RC interconnect information.
  • A StarRC command file. For StarXtract, GDSII layers to be included must be equated to a LEF database layer using the GDS_LAYER_MAP_FILE command. Any GDSII layer not listed in the layer map file is not translated for extraction and does not contribute to the parasitics.

KEY StarRC needs a layout database, a layer map file, an nxtgrd file and a command file.

TIE Cells - Purpose and Structure

  • At lower technology nodes, the transistor gate oxide is very thin and sensitive to power-supply voltage fluctuations. Connecting a transistor gate directly to the power/ground network could damage the gate