Control Logic
The FSM that issues the datapath control signals in the right sequence.
Description
The control logic is the state machine that drives a datapath's control inputs (load, add, shift, count) in the correct order and tests datapath status to decide branches. It is derived directly from the ASMD chart's state boxes and decisions.
- Each ASMD state → one controller state.
- Each state asserts the control signals for its transfers.
- Decision boxes test datapath status (zero, sign, carry).
- Next-state logic follows the chart's arrows.
- Output style: Moore (state) or Mealy (state+input).
- Hardwired control: gates/FSM (fast, fixed).
- Microprogrammed control: a control ROM (flexible).
- One-hot state encoding simplifies output logic.
- Control signals fan out to datapath enables.
- Status signals fan in from the datapath.
At a glance
What
The FSM producing the timed control signals for a datapath.
Why
The datapath does nothing useful without correct sequencing.
How
States issue control outputs; decisions test datapath status flags.
Where
The controller half of every RTL system.
When
Derived once the datapath and ASMD are set.
Think of it like…
Control logic is the orchestra conductor: it cues each section (datapath unit) at the right beat and watches the players (status) to adjust.
Deriving control
- Each ASMD state → one controller state.
- Each state asserts the control signals for its transfers.
- Decision boxes test datapath status (zero, sign, carry).
- Next-state logic follows the chart's arrows.
- Output style: Moore (state) or Mealy (state+input).
Implementation choices
- Hardwired control: gates/FSM (fast, fixed).
- Microprogrammed control: a control ROM (flexible).
- One-hot state encoding simplifies output logic.
- Control signals fan out to datapath enables.
- Status signals fan in from the datapath.
Control vs datapath
| Direction | Signals |
|---|---|
| Control → datapath | load, add, shift, count |
| Datapath → control | zero, sign, carry |
A controller often sequences via a counter
▶ live simulatorPress Step or Runto count; each bit's waveform is traced live.
Real-world applications
The 5 Whys
- 1
Why control logic? Sequence the datapath operations.
- 2
Why test status? Branch on datapath conditions.
- 3
Why hardwired vs microprogrammed? Speed vs flexibility.
- 4
Why one-hot? Simpler, faster decode.
- 5
Root cause: a datapath needs an FSM to time its transfers.
Cheat sheet
Working principle
- States issue control outputs; decisions test datapath status flags.
- The FSM producing the timed control signals for a datapath.
Formulas & Boolean expressions
- Control → datapath = load, add, shift, count
- Datapath → control = zero, sign, carry
Key facts
- Each ASMD state → one controller state.
- Hardwired control: gates/FSM (fast, fixed).
Why it exists
- Root cause: a datapath needs an FSM to time its transfers.