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VLSI Physical Design  ›  Ch 11. Cell Libraries & ECO

KEY GDSII is the hierarchical binary layout database sent to the foundry to fabricate the chip.

The SDF File

  • SDF stands for Standard Delay Format.
  • It carries timing information and is widely used in backend VLSI design flows. An SDF file describes:
  • Path delays.
  • Interconnect delays.
  • Timing constraints.
  • Technology parameters that influence delay.
  • Cell delays. SDF is also used to back-annotate delays into gate-level simulations so they mimic real silicon behaviour.

KEY SDF holds path, interconnect and cell delays, used for backend flows and delay back-annotation.

The DEF File

  • DEF (Design Exchange Format) is an industry-standard ASCII file that represents the logic and connectivity of an IC.
  • It typically captures die size, connectivity, pin placement and power-domain information.

KEY DEF is an ASCII file describing an IC's connectivity, die size, pin placement and power domains.

Metal-Programmable ECO Cells

  • There are two kinds: ECO filler cells and functional ECO cells. ECO filler cells are built only from the base (FEOL) layers - implant, diffusion and poly - so that any functional change can later be made using the back-end-of-line layers.
  • Functional programmable ECO cells cover a broad range of combinational and sequential gates with several drive strengths, achieved by combining widths of filler cells. They share the same