Setup-Fail vs Hold-Fail Chip

The chip that fails setup can still be used. Setup failure is frequency dependent: lowering the clock frequency gives the flop or latch input more time to meet setup, so eventually setup passes.

The chip that fails hold cannot be saved this way - hold failure is frequency independent and is a true functional failure.

KEY The setup-failing chip is usable at a lower frequency; the hold-failing chip is a functional reject.

Edge-Trigger Choice and Violations

A positive-edge-triggered flip-flop favours setup - it tends to reduce setup violations. A negative-edge-triggered flip-flop favours hold - it tends to reduce hold violations.

KEY Positive-edge flops ease setup; negative-edge flops ease hold.