time genuinely does not matter - those paths are declared false paths and the optimizer skips them for timing.

KEY A false path can never be exercised in normal operation, so the optimizer ignores it for timing.

Wire Load Model

A wire load model is a non-linear-delay-model (NLDM) construct that provides estimated resistance and capacitance for a net.

KEY A wire load model gives estimated net R and C, based on the NLDM approach.

Source and Use of Wire Load Models

• Wire load models (WLMs) are delivered by the library vendor.
• We do not build WLMs ourselves.
• A WLM is selected according to the block area.

KEY WLMs are supplied by the library vendor and chosen by area - they are not created in-house.

Typical Derate Values in Timing

• For setup checks, derate the data path by roughly 8-15% and leave the clock path underated.
• For hold checks, derate the clock path by roughly 8-15% and leave the data path underated.

KEY About 8-15% derate - on the data path for setup, on the clock path for hold.

Sign-Off Corners and Derate

• The corners checked are worst, best and typical.
• The same derate value is used for the best and worst corners; for the typical corner it can be smaller.

KEY Sign off at worst, best and typical corners; typical may use a lower derate.