KEY Global variation is die-to-die (modelled as corners); local OCV is within-die (modelled as derate).

CRPR in STA

CRPR stands for Clock Reconvergence Pessimism Removal. STA is worst-case based - for setup it uses the slowest launch path and the fastest capture path. When the launch and capture clocks share a common path, that worst-case assumption is overly pessimistic, because the shared segment cannot be both fast and slow at once. CRPR corrects this accuracy limitation of STA.

KEY CRPR removes the false pessimism STA adds on the common (shared) part of the clock path.

Wire Load Model (WLM)

A wire load model estimates net delay based on area and fan-out. The estimated delay depends on the net's resistance, capacitance and area.

KEY A WLM estimates net delay from area and fan-out, via R, C and net area.

Information for MMMC View Definitions

Creating proper MMMC view definitions requires:

• RC corners for resistance and capacitance (e.g. worst and best).
• A library set covering all timing libraries used by the design (e.g. slow and fast libraries).
• Delay corners for cell delay (data and clock) and net delay.
• A constraint mode for each design constraint, for all functions (setup, hold) and tests (scan capture, scan shift).
• Analysis views for each constraint mode and delay corner.
• An analysis-view set for setup and hold across all design functions.

KEY MMMC needs RC corners, library sets, delay corners, constraint modes and analysis views.