Introduction (Combinational Logic)
What combinational logic is and what this chapter builds.
Description
Combinational logic produces outputs that depend only on the present inputs — no memory. This chapter covers analysis and a design procedure, then the standard building blocks: adders, subtractors, comparators, decoders, encoders, multiplexers, and their HDL models.
- Output = f(inputs) only; no stored state.
- No feedback loops (those make it sequential).
- Specified fully by a truth table.
- Built from the gate primitives of Chapter 2.
- Propagation delay sets the speed.
- Adders / subtractors and decimal adders.
- Binary multiplier and magnitude comparator.
- Decoders and encoders.
- Multiplexers and demultiplexers.
- HDL models, behavioral modeling, testbenches.
At a glance
What
Logic whose outputs are a pure function of the current inputs.
Why
It performs all arithmetic, routing, and decoding in a system.
How
Interconnect gates with no feedback or storage.
Where
ALUs, decoders, muxes — the datapath's combinational parts.
When
Whenever output must follow inputs with no memory of the past.
Think of it like…
A combinational circuit is a vending machine that reacts only to the buttons pressed right now, remembering nothing.
Definition
- Output = f(inputs) only; no stored state.
- No feedback loops (those make it sequential).
- Specified fully by a truth table.
- Built from the gate primitives of Chapter 2.
- Propagation delay sets the speed.
Chapter building blocks
- Adders / subtractors and decimal adders.
- Binary multiplier and magnitude comparator.
- Decoders and encoders.
- Multiplexers and demultiplexers.
- HDL models, behavioral modeling, testbenches.
Combinational vs sequential
| Combinational | Sequential | |
|---|---|---|
| Memory | none | yes |
| Output | f(inputs) | f(inputs, state) |
| Feedback | no | yes |
Real-world applications
The 5 Whys
- 1
Why combinational logic? To compute functions of current inputs.
- 2
Why no feedback? Feedback introduces memory (sequential).
- 3
Why a truth table? It fully specifies the behavior.
- 4
Why building blocks? Reusable MSI parts speed design.
- 5
Root cause: memoryless gate networks implement all instantaneous logic.
Cheat sheet
Working principle
- Interconnect gates with no feedback or storage.
- Logic whose outputs are a pure function of the current inputs.
Formulas & Boolean expressions
- Output = f(inputs) only; no stored state.
Key facts
- Output = f(inputs) only; no stored state.
- Adders / subtractors and decimal adders.
Why it exists
- Root cause: memoryless gate networks implement all instantaneous logic.