NAND & NOR Implementation
Convert any AND-OR logic into all-NAND (or all-NOR) form.
Description
Realizing logic using only NAND gates (or only NOR gates). NAND/NOR are universal and cheaper/faster in CMOS than AND/OR. Take the SOP form and replace AND-OR with NAND-NAND (DeMorgan equivalence).
- A two-level AND-OR (SOP) maps directly to two levels of NAND.
- Add inverters/bubbles per DeMorgan where single literals feed the second level.
- A two-level OR-AND (POS) maps directly to two levels of NOR.
- What: Realizing logic using only NAND gates (or only NOR gates).
- Why: NAND/NOR are universal and cheaper/faster in CMOS than AND/OR.
- How: Take the SOP form and replace AND-OR with NAND-NAND (DeMorgan equivalence).
- Where: Standard-cell ASICs and any technology where NAND/NOR are the native cells.
- When: During technology mapping of a minimized expression.
- Analogy — Like a kitchen that only stocks one all-purpose knife: instead of buying special tools, you learn to do every cut with NAND. Two layers of that one tool rebuild any AND-OR circuit.
At a glance
What
Realizing logic using only NAND gates (or only NOR gates).
Why
NAND/NOR are universal and cheaper/faster in CMOS than AND/OR.
How
Take the SOP form and replace AND-OR with NAND-NAND (DeMorgan equivalence).
Where
Standard-cell ASICs and any technology where NAND/NOR are the native cells.
When
During technology mapping of a minimized expression.
Think of it like…
Like a kitchen that only stocks one all-purpose knife: instead of buying special tools, you learn to do every cut with NAND. Two layers of that one tool rebuild any AND-OR circuit.
SOP → NAND-NAND
- A two-level AND-OR (SOP) maps directly to two levels of NAND.
- Add inverters/bubbles per DeMorgan where single literals feed the second level.
POS → NOR-NOR
- A two-level OR-AND (POS) maps directly to two levels of NOR.
Two-level mappings
| Start form | Gate realization |
|---|---|
| SOP (AND-OR) | NAND – NAND |
| POS (OR-AND) | NOR – NOR |
Build intuition with NAND / NOR
▶ live simulatorClick a terminal (A/B) to toggle it · glowing wires carry a logic 1 · the lamp is output Y
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The 5 Whys
- 1
Why NAND/NOR only? They are universal and native in CMOS.
- 2
Why are they native? They need fewer transistors than AND/OR.
- 3
Why fewer transistors? CMOS naturally inverts, so NAND/NOR come free.
- 4
Why does that matter? Smaller, faster cells across the whole chip.
- 5
Root cause: matching logic to the technology's cheapest gate minimizes cost.
Cheat sheet
Working principle
- Take the SOP form and replace AND-OR with NAND-NAND (DeMorgan equivalence).
- Realizing logic using only NAND gates (or only NOR gates).
Formulas & Boolean expressions
- SOP (AND-OR) = NAND – NAND
- POS (OR-AND) = NOR – NOR
Key facts
- A two-level AND-OR (SOP) maps directly to two levels of NAND.
- A two-level OR-AND (POS) maps directly to two levels of NOR.
Why it exists
- Root cause: matching logic to the technology's cheapest gate minimizes cost.