assignment, and fix crosstalk violations during post-route optimization.
- Enable crosstalk prevention during track assignment with
set_si_options -route_xtalk_prevention trueand use the-xtalk_reductionoption when runningroute_opt.
KEY Prevent SI through SI-aware placement/routing, transition and net-length control, clock NDRs and shielding, and crosstalk-aware route options.
Techniques to Fix Crosstalk
Crosstalk can be reduced by promoting the net to a higher metal layer, shortening the net length, shielding the net, upsizing the driver, or inserting buffers along the net.
KEY Fix crosstalk with layer promotion, shorter nets, shielding, driver upsizing or buffering.
Noise Glitch and Functionality
Not always - a glitch only matters if it gets captured by a flop. A noise bump on a clock or set/reset pin will affect functionality. A bump on a victim net propagates to the output of fanout cells only if its height exceeds the noise threshold and its width exceeds the fanout cell delay.
As long as the bump does not pass through the combinational logic, there is no functional impact. But if it propagates all the way to a flop's D pin and gets captured, the design behaviour changes.
KEY A glitch only breaks function if it propagates and is captured by a flop.
The Miller Effect
- Inside a CMOS inverter there is a feedback capacitance Cgd between the output drain and input gate. By the Miller theorem this Cgd appears at the input multiplied by (gain A + 1), i.e. Cgd(A+1), which lowers the maximum operating frequency and bandwidth of the amplifier compared with having no Cgd.
- When a CMOS inverter is used as a logic gate, the transistors act as