KEY Jitter is edge deviation from the ideal clock position - it can break setup or hold timing.

Types of Clock Jitter

There are four types of clock jitter:

• Period jitter - deviation of the clock period measured over many cycles (also called peak-to-peak period jitter).
• Cycle-to-cycle jitter - the deviation between two adjacent clock-cycle edges within a random window of cycles.
• Phase jitter - rapid short-term fluctuation from phase noise in the frequency domain, translated into jitter values.
• Time interval error (TIE) jitter - how far each active edge varies from the corresponding ideal-clock edge; RMS TIE gives the standard deviation of the timing error.

KEY Four types: period, cycle-to-cycle, phase, and time-interval-error (TIE) jitter.

Jitter Type for High-Frequency Jitter

Cycle-to-cycle jitter is used to determine high-frequency jitter, since it captures the peak clock-jitter value within a random group of clock cycles.

KEY Cycle-to-cycle jitter is the measure used for high-frequency jitter.

The Lockup Latch

A lockup latch is a transparent latch placed where clock skew is at its maximum, used in design-for-testability to reduce skew and satisfy hold constraints. Skew is common in multi-clock systems and can occur during scan shift and capture.

Shift skew is reduced by grouping flip-flops driven by the same clock, and inserting a lockup latch where domains cross removes it completely. In a scan chain the lockup latch acts as an end point, splitting the path into Domain 1 (launch flop to lockup latch) and Domain 2 (lockup latch to capture flop), preserving clock grouping. It can be placed automatically or via a scan-chain order file.